1. Field of the Invention
This invention pertains to the field of computer hardware. More particularly, it pertains to a machine that applies minute quantities of solderable paste, in accurately controlled stripes and other geometries, to very small electronic components called Integrated Passive Components (IPCs) or "array chips" used in computer circuits, and to a feed mechanism that handles the chips in novel ways to load them into a pliable mask housed in a transfer tape or carrier belt for introduction to the paste-applying process.
2. Description of the Prior Art
Computers and computer-controlled appliances are becoming more powerful and can undertake and perform a wider range of tasks. To do so, computer component designers and manufacturers are cramming more and more components into them. And, in order to retain the size of the computers and appliances within a user-friendly range, the components are made smaller and are crowded closer together in the computer circuits.
The solid state capacitor has been reduced in size from the old-fashioned cylindrical device, about the size of a cigarette filter, with wires extending outward from each end, to a tiny rectangular "chip" that is smaller than a grain of rice. Instead of wires, one or more of the walls of the chip are striped with a solderable paste that is dried then fired to produce surfaces that later can be soldered directly onto a circuit board. Previously issued U.S. Pat. No. 5,226,382 discloses and claims a machine for placing a stripe or trace of solderable paste on surfaces of a chip and drying the paste so that the chip can later be fired. This machine uses a metal carrier belt or tape with rubber masks formed therein having slots in the masks into which the chips are positioned for processing. This machine can handle extremely small chips where opposed ends thereof are to be covered with paste.
Recently, a new computer circuit component has emerged that, while not necessarily smaller in overall size from the chip, crams a plurality of circuit components into a single array chip that is simultaneously solderable to a number of different electronic circuits. This device is called an Integrated Passive Component or IPC, but is still referred to in the industry as a "chip" and comprises a plurality or array, such as four or five separate capacitors sandwiched together in a single chip having overall dimensions such as top and bottom surfaces 0.1250 inches in length and 0.0600 inches in width, with opposed end walls 0.060 inches wide and 0.040 inches high and opposed side walls 0.040 inches high and 0.1250 inches long.
A typical IPC or array chip is shown in FIG. 1a with its wall surfaces marked as shown. To incorporate such a chip into a computer circuit requires separate solderable paste stripes placed along opposite surfaces such as the side surfaces or end surfaces and soldered onto copper traces formed on a circuit board as shown in FIG. 1b. The width of the stripes is generally set at 0.015.+-.0.007 inches, with a 0.012.+-.0.007 inch turn-down edge at the end of each stripe along the adjacent wall as shown in FIG. 1a. As with other chip components, after the paste is applied, it is subjected to a heat-drying cycle to set the paste, and thereafter to a firing cycle to fuse the paste on the chip.
With such a small chip and the small differences between the width and height of the chip, handling and insertion into the mask of the carrier tape has become extremely important. It is imperative that the multiple stripes be placed on only the appropriate surfaces and that their placement is accomplished with extreme accuracy. Any splashing of the paste onto other surfaces of the chip would provide a site for shorting the circuit and significantly degrading the actions of the computer. Accordingly, the feed means is not only required to place the chip into the carrier tape in a correct position and location, but the chip must also be handled correctly so that the appropriate surface is exposed in proper orientation to receive the stripes of paste with the requisite accuracy.
The matter of speed in loading has become quite important of late. The goal in the industry is to reach higher and higher processing speeds in order to lower the unit price of each chip. The principal reason for this higher speed is so that more chips are made per unit time in order to provide a larger base for amortizing the rather expensive striping machines. Other than the aforesaid previous U.S. Patent, the principal means of terminating chips involves the use of large metal and rubber plates where workers spread the chips over the holes in the plate by hand, then use another plate to press against the chips to force them partially through holes formed in the plate to expose the ends of the chips, whereupon the plate is placed in an apparatus and hand-dipped in a vat filled with the liquid paste. All this handling is very expensive and the speed of loading, dipping, and unloading is quite limited.
Further, it appears certain limitations are being reached in the prior art in the step of dipping the ends of the chips into the vat of terminating paste. While prior art methods are operable to dip an entire end of a chip in the paste, making stripes of the paste on a single, small surface, with accurate separation between the stripes on the order of 0.015 inches or less, is straining the capability of the prior art.